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OpenMPTL - STM32F10X
C++ Microprocessor Template Library
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Reset and clock control.
#include <rcc.hpp>
Classes | |
| struct | AHBENR |
| AHB Peripheral Clock enable register (RCC_AHBENR) More... | |
| struct | AHBRSTR |
| AHB peripheral clock reset register (RCC_AHBRSTR) (only available on connectivity line devices!) More... | |
| struct | APB1ENR |
| APB1 peripheral clock enable register (RCC_APB1ENR) More... | |
| struct | APB1RSTR |
| APB1 peripheral reset register (RCC_APB1RSTR) More... | |
| struct | APB2ENR |
| APB2 peripheral clock enable register (RCC_APB2ENR) More... | |
| struct | APB2RSTR |
| APB2 peripheral reset register (RCC_APB2RSTR) More... | |
| struct | BDCR |
| Backup domain control register (RCC_BDCR) More... | |
| struct | CFGR |
| Clock configuration register (RCC_CFGR) More... | |
| struct | CFGR2 |
| Clock configuration register2 (RCC_CFGR2) (only available on connectivity line devices!) More... | |
| struct | CIR |
| Clock interrupt register (RCC_CIR) More... | |
| struct | CR |
| Clock control register. More... | |
| struct | CSR |
| Control/status register (RCC_CSR) More... | |
Static Public Attributes | |
| static constexpr reg_addr_t | base_addr = 0x40021000 |
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static |
1.8.13