mptl::RCC Struct Reference

Reset and clock control.

#include <rcc.hpp>

Classes
struct	AHB1ENR
	AHB1 peripheral clock register. More...
struct	AHB1LPENR
	AHB1 peripheral clock enable in low power mode register. More...
struct	AHB1RSTR
	AHB1 peripheral reset register. More...
struct	AHB2ENR
	AHB2 peripheral clock enable register. More...
struct	AHB2LPENR
	AHB2 peripheral clock enable in low power mode register. More...
struct	AHB2RSTR
	AHB2 peripheral reset register. More...
struct	AHB3ENR
	AHB3 peripheral clock enable register. More...
struct	AHB3LPENR
	AHB3 peripheral clock enable in low power mode register. More...
struct	AHB3RSTR
	AHB3 peripheral reset register. More...
struct	APB1ENR
	APB1 peripheral clock enable register. More...
struct	APB1LPENR
	APB1 peripheral clock enable in low power mode register. More...
struct	APB1RSTR
	APB1 peripheral reset register. More...
struct	APB2ENR
	APB2 peripheral clock enable register. More...
struct	APB2LPENR
	APB2 peripheral clock enabled in low power mode register. More...
struct	APB2RSTR
	APB2 peripheral reset register. More...
struct	BDCR
	Backup domain control register. More...
struct	CFGR
	Clock configuration register. More...
struct	CIR
	Clock interrupt register. More...
struct	CR
	Clock control register. More...
struct	CSR
	Clock control and status register. More...
struct	PLLCFGR
	PLL configuration register. More...
struct	PLLI2SCFGR
	PLLI2S configuration register. More...
struct	SSCGR
	Spread spectrum clock generation register. More...

Static Public Attributes
static constexpr reg_addr_t	base_addr = 0x40023800

Member Data Documentation

base_addr

constexpr reg_addr_t mptl::RCC::base_addr = 0x40023800

static

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The documentation for this struct was generated from the following file:

• arch/arm/cortex/stm32/f4/include/arch/reg/rcc.hpp