Flash access control register.
#include <flash.hpp>
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| using | DCRST = regbits< type, 12, 1 > |
| | Data cache reset. More...
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| |
| using | ICRST = regbits< type, 11, 1 > |
| | Instruction cache reset. More...
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| |
| using | DCEN = regbits< type, 10, 1 > |
| | Data cache enable. More...
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| |
| using | ICEN = regbits< type, 9, 1 > |
| | Instruction cache enable. More...
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| |
| using | PRFTEN = regbits< type, 8, 1 > |
| | Prefetch enable. More...
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| |
| using | LATENCY = regbits< type, 0, 3 > |
| | Latency. More...
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| |
| typedef reg< Tp, base_addr+0x00, rw, 0x00000000 > | type |
| |
| typedef type | reg_type |
| |
| typedef regbits< type, 0, sizeof(Tp) *8 > | regbits_type |
| |
| typedef Tp | value_type |
| |
| typedef regmask< reg_type, 0, 0 > | neutral_regmask |
| |
| typedef Tp | value_type |
| |
◆ DCEN
◆ DCRST
◆ ICEN
◆ ICRST
◆ LATENCY
◆ PRFTEN
The documentation for this struct was generated from the following file:
- arch/arm/cortex/stm32/f4/include/arch/reg/flash.hpp