OpenMPTL - STM32 (common)
C++ Microprocessor Template Library
Classes | Public Types | Static Public Attributes | List of all members
mptl::TIM_common< _base_addr > Struct Template Reference

Advanced timer. More...

#include <tim.hpp>

Classes

struct  BDTR
 Break and dead-time register. More...
 
struct  CCER
 Capture/compare enable register. More...
 
struct  CCMR1_Input
 Capture/compare mode register 1 (input mode) More...
 
struct  CCMR1_Output
 Capture/compare mode register 1 (output mode) More...
 
struct  CCMR2_Input
 Capture/compare mode register 2 (input mode) More...
 
struct  CCMR2_Output
 Capture/compare mode register 2 (output mode) More...
 
struct  CR1
 Control register 1. More...
 
struct  CR2
 Control register 2. More...
 
struct  DCR
 DMA control register. More...
 
struct  DIER
 DMA/Interrupt enable register. More...
 
struct  EGR
 Event generation register. More...
 
struct  RCR
 Repetition counter register. More...
 
struct  SMCR
 Slave mode control register. More...
 
struct  SR
 Status register. More...
 

Public Types

using CNT = reg< std::uint_fast16_t, base_addr+0x24, rw, 0x0000 >
 Counter. More...
 
using PSC = reg< std::uint_fast16_t, base_addr+0x28, rw, 0x0000 >
 Prescaler. More...
 
using ARR = reg< std::uint_fast16_t, base_addr+0x2c, rw, 0x0000 >
 Auto-reload register. More...
 
using CCR1 = reg< std::uint_fast16_t, base_addr+0x34, rw, 0x0000 >
 Capture/compare register 1. More...
 
using CCR2 = reg< std::uint_fast16_t, base_addr+0x38, rw, 0x0000 >
 Capture/compare register 2. More...
 
using CCR3 = reg< std::uint_fast16_t, base_addr+0x3c, rw, 0x0000 >
 Capture/compare register 3. More...
 
using CCR4 = reg< std::uint_fast16_t, base_addr+0x40, rw, 0x0000 >
 Capture/compare register 4. More...
 
using DMAR = reg< std::uint_fast16_t, base_addr+0x4c, rw, 0x0000 >
 DMA address for full transfer. More...
 

Static Public Attributes

static constexpr reg_addr_t base_addr = _base_addr
 

Detailed Description

template<reg_addr_t _base_addr>
struct mptl::TIM_common< _base_addr >

Note that the registers are actually only 16bit wide, but accessing them with 32bit is faster in general.

NOTE: not all register bits are valid for all timer, especially:

For simplicity reasons, they are not defined separately. Check the reference manual for details about which register bits are valid for the timers you use.

Member Typedef Documentation

◆ ARR

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::ARR = reg< std::uint_fast16_t, base_addr + 0x2c, rw, 0x0000 >

◆ CCR1

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::CCR1 = reg< std::uint_fast16_t, base_addr + 0x34, rw, 0x0000 >

◆ CCR2

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::CCR2 = reg< std::uint_fast16_t, base_addr + 0x38, rw, 0x0000 >

◆ CCR3

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::CCR3 = reg< std::uint_fast16_t, base_addr + 0x3c, rw, 0x0000 >

◆ CCR4

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::CCR4 = reg< std::uint_fast16_t, base_addr + 0x40, rw, 0x0000 >

◆ CNT

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::CNT = reg< std::uint_fast16_t, base_addr + 0x24, rw, 0x0000 >

◆ DMAR

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::DMAR = reg< std::uint_fast16_t, base_addr + 0x4c, rw, 0x0000 >

◆ PSC

template<reg_addr_t _base_addr>
using mptl::TIM_common< _base_addr >::PSC = reg< std::uint_fast16_t, base_addr + 0x28, rw, 0x0000 >

Member Data Documentation

◆ base_addr

template<reg_addr_t _base_addr>
constexpr reg_addr_t mptl::TIM_common< _base_addr >::base_addr = _base_addr
static

The documentation for this struct was generated from the following file: