OpenMPTL - STM32F4
C++ Microprocessor Template Library
nvic.hpp
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1 /*
2  * OpenMPTL - C++ Microprocessor Template Library
3  *
4  * Copyright (C) 2012-2017 Axel Burri <axel@tty0.ch>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 3 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program. If not, see <http://www.gnu.org/licenses/>.
18  *
19  */
20 
21 #ifndef ARCH_NVIC_HPP_INCLUDED
22 #define ARCH_NVIC_HPP_INCLUDED
23 
24 #include "../../../../common/nvic.hpp"
25 
26 namespace mptl { namespace irq {
27 
28 using wwdg = irq_channel< 0>; /**< Window Watchdog interrupt */
29 using pvd = irq_channel< 1>; /**< PVD through EXTI line detection interrupt */
30 using tamp_stamp = irq_channel< 2>; /**< Tamper and TimeStamp interrupts through the EXTI line */
31 using rtc_wkup = irq_channel< 3>; /**< RTC Wakeup interrupt through the EXTI line */
32 using flash = irq_channel< 4>; /**< Flash global interrupt */
33 using rcc = irq_channel< 5>; /**< RCC global interrupt */
34 using exti0 = irq_channel< 6>; /**< EXTI Line0 interrupt */
35 using exti1 = irq_channel< 7>; /**< EXTI Line1 interrupt */
36 using exti2 = irq_channel< 8>; /**< EXTI Line2 interrupt */
37 using exti3 = irq_channel< 9>; /**< EXTI Line3 interrupt */
38 using exti4 = irq_channel<10>; /**< EXTI Line4 interrupt */
39 using dma1_stream0 = irq_channel<11>; /**< DMA1 Stream0 global interrupt */
40 using dma1_stream1 = irq_channel<12>; /**< DMA1 Stream1 global interrupt */
41 using dma1_stream2 = irq_channel<13>; /**< DMA1 Stream2 global interrupt */
42 using dma1_stream3 = irq_channel<14>; /**< DMA1 Stream3 global interrupt */
43 using dma1_stream4 = irq_channel<15>; /**< DMA1 Stream4 global interrupt */
44 using dma1_stream5 = irq_channel<16>; /**< DMA1 Stream5 global interrupt */
45 using dma1_stream6 = irq_channel<17>; /**< DMA1 Stream6 global interrupt */
46 using adc = irq_channel<18>; /**< ADC1 global interrupt / ADC2 global interrupts / ADC3 global interrupts */
47 using can1_tx = irq_channel<19>; /**< CAN1 TX interrupts */
48 using can1_rx0 = irq_channel<20>; /**< CAN1 RX0 interrupts */
49 using can1_rx1 = irq_channel<21>; /**< CAN1 RX1 interrupts */
50 using can1_sce = irq_channel<22>; /**< CAN1 SCE interrupt */
51 using exti9_5 = irq_channel<23>; /**< EXTI Line[9:5] interrupts */
52 using tim1_brk_tim9 = irq_channel<24>; /**< TIM1 Break interrupt and TIM9 global interrupt */
53 using tim1_up_tim10 = irq_channel<25>; /**< TIM1 Update interrupt and TIM10 global interrupt */
54 using tim1_trg_com_tim11 = irq_channel<26>; /**< TIM1 Trigger and Commutation interrupts and TIM11 global interrupt */
55 using tim1_cc = irq_channel<27>; /**< TIM1 Capture Compare interrupt */
56 using tim2 = irq_channel<28>; /**< TIM2 global interrupt */
57 using tim3 = irq_channel<29>; /**< TIM3 global interrupt */
58 using tim4 = irq_channel<30>; /**< TIM4 global interrupt */
59 using i2c1_ev = irq_channel<31>; /**< I2C1 event interrupt */
60 using i2c1_er = irq_channel<32>; /**< I2C1 error interrupt */
61 using i2c2_ev = irq_channel<33>; /**< I2C2 event interrupt */
62 using i2c2_er = irq_channel<34>; /**< I2C2 error interrupt */
63 using spi1 = irq_channel<35>; /**< SPI1 global interrupt */
64 using spi2 = irq_channel<36>; /**< SPI2 global interrupt */
65 using usart1 = irq_channel<37>; /**< USART1 global interrupt */
66 using usart2 = irq_channel<38>; /**< USART2 global interrupt */
67 using usart3 = irq_channel<39>; /**< USART3 global interrupt */
68 using exti15_10 = irq_channel<40>; /**< EXTI Line[15:10] interrupts */
69 using rtc_alarm = irq_channel<41>; /**< RTC Alarms (A and B) through EXTI line interrupt */
70 using otg_fs_wkup = irq_channel<42>; /**< USB On-The-Go FS Wakeup through EXTI line interrupt */
71 using tim8_brk_tim12 = irq_channel<43>; /**< TIM8 Break interrupt and TIM12 global interrupt */
72 using tim8_up_tim13 = irq_channel<44>; /**< TIM8 Update interrupt and TIM13 global interrupt */
73 using tim8_trg_com_tim14 = irq_channel<45>; /**< TIM8 Trigger and Commutation interrupts and TIM14 global interrupt */
74 using tim8_cc = irq_channel<46>; /**< TIM8 Capture Compare interrupt */
75 using dma1_stream7 = irq_channel<47>; /**< DMA1 Stream7 global interrupt */
76 using fsmc = irq_channel<48>; /**< FSMC global interrupt */
77 using sdio = irq_channel<49>; /**< SDIO global interrupt */
78 using tim5 = irq_channel<50>; /**< TIM5 global interrupt */
79 using spi3 = irq_channel<51>; /**< SPI3 global interrupt */
80 using uart4 = irq_channel<52>; /**< UART4 global interrupt */
81 using uart5 = irq_channel<53>; /**< UART5 global interrupt */
82 using tim6_dac = irq_channel<54>; /**< TIM6 global interrupt, DAC1 and DAC2 underrun error interrupt */
83 using tim7 = irq_channel<55>; /**< TIM7 global interrupt */
84 using dma2_stream0 = irq_channel<56>; /**< DMA2 Stream0 global interrupt */
85 using dma2_stream1 = irq_channel<57>; /**< DMA2 Stream1 global interrupt */
86 using dma2_stream2 = irq_channel<58>; /**< DMA2 Stream2 global interrupt */
87 using dma2_stream3 = irq_channel<59>; /**< DMA2 Stream3 global interrupt */
88 using dma2_stream4 = irq_channel<60>; /**< DMA2 Stream4 global interrupt */
89 using eth = irq_channel<61>; /**< Ethernet global interrupt */
90 using eth_wkup = irq_channel<62>; /**< Ethernet Wakeup through EXTI line interrupt */
91 using can2_tx = irq_channel<63>; /**< CAN2 TX interrupts */
92 using can2_rx0 = irq_channel<64>; /**< CAN2 RX0 interrupts */
93 using can2_rx1 = irq_channel<65>; /**< CAN2 RX1 interrupts */
94 using can2_sce = irq_channel<66>; /**< CAN2 SCE interrupt */
95 using otg_fs = irq_channel<67>; /**< USB On The Go FS global interrupt */
96 using dma2_stream5 = irq_channel<68>; /**< DMA2 Stream5 global interrupt */
97 using dma2_stream6 = irq_channel<69>; /**< DMA2 Stream6 global interrupt */
98 using dma2_stream7 = irq_channel<70>; /**< DMA2 Stream7 global interrupt */
99 using usart6 = irq_channel<71>; /**< USART6 global interrupt */
100 using i2c3_ev = irq_channel<72>; /**< I2C3 event interrupt */
101 using i2c3_er = irq_channel<73>; /**< I2C3 error interrupt */
102 using otg_hs_ep1_out = irq_channel<74>; /**< USB On The Go HS End Point 1 Out global interrupt */
103 using otg_hs_ep1_in = irq_channel<75>; /**< USB On The Go HS End Point 1 In global interrupt */
104 using otg_hs_wkup = irq_channel<76>; /**< USB On The Go HS Wakeup through EXTI interrupt */
105 using otg_hs = irq_channel<77>; /**< USB On The Go HS global interrupt */
106 using dcmi = irq_channel<78>; /**< DCMI global interrupt */
107 using cryp = irq_channel<79>; /**< CRYP crypto global interrupt */
108 using hash_rng = irq_channel<80>; /**< Hash and Rng global interrupt */
109 using fpu = irq_channel<81>; /**< FPU global interrupt */
110 
111 
112 template<unsigned usart_no> class usart;
113 template<> class usart<1> : public usart1 { };
114 template<> class usart<2> : public usart2 { };
115 template<> class usart<3> : public usart3 { };
116 template<> class usart<6> : public usart6 { };
117 
118 template<unsigned usart_no> class spi;
119 template<> class spi<1> : public spi1 { };
120 template<> class spi<2> : public spi2 { };
121 template<> class spi<3> : public spi3 { };
122 
123 static constexpr int numof_interrupt_channels = 82;
124 
125 } } // namespace mptl::irq
126 
127 #endif // ARCH_NVIC_HPP_INCLUDED
mptl::irq::numof_interrupt_channels
static constexpr int numof_interrupt_channels
Definition: nvic.hpp:123
mptl::irq::spi
Definition: nvic.hpp:118
mptl::irq_channel
mptl::irq::usart
Definition: nvic.hpp:112
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